To be able to support controllers with less than 6 timers, we need a field to be able to iterate over the different count.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]> --- include/hw/timer/allwinner-a10-pit.h | 1 + hw/timer/allwinner-a10-pit.c | 10 ++++++---- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/include/hw/timer/allwinner-a10-pit.h b/include/hw/timer/allwinner-a10-pit.h index e0f864a954..8c64c33f01 100644 --- a/include/hw/timer/allwinner-a10-pit.h +++ b/include/hw/timer/allwinner-a10-pit.h @@ -24,6 +24,7 @@ struct AwA10PITState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ + size_t timer_count; AwA10TimerContext timer[AW_PIT_TIMER_MAX]; MemoryRegion iomem; uint32_t clk_freq[4]; diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c index ea92fdda32..3f47588703 100644 --- a/hw/timer/allwinner-a10-pit.c +++ b/hw/timer/allwinner-a10-pit.c @@ -58,7 +58,7 @@ static void a10_pit_update_irq(AwA10PITState *s) { int i; - for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) { + for (i = 0; i < s->timer_count; i++) { qemu_set_irq(s->timer[i].irq, !!(s->irq_status & s->irq_enable & (1 << i))); } @@ -271,7 +271,7 @@ static void a10_pit_reset(DeviceState *dev) s->irq_status = 0; a10_pit_update_irq(s); - for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) { + for (i = 0; i < s->timer_count; i++) { s->timer[i].control = AW_A10_PIT_DEFAULT_CLOCK; s->timer[i].interval = 0; s->timer[i].count = 0; @@ -309,14 +309,16 @@ static void a10_pit_init(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); uint8_t i; - for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) { + s->timer_count = AW_A10_PIT_TIMER_NR; + + for (i = 0; i < s->timer_count; i++) { sysbus_init_irq(sbd, &s->timer[i].irq); } memory_region_init_io(&s->iomem, OBJECT(s), &a10_pit_ops, s, TYPE_AW_A10_PIT, 0x400); sysbus_init_mmio(sbd, &s->iomem); - for (i = 0; i < AW_A10_PIT_TIMER_NR; i++) { + for (i = 0; i < s->timer_count; i++) { AwA10TimerContext *tc = &s->timer[i]; tc->container = s; -- 2.21.0
