On Fri, 11 Oct 2019 at 14:49, Richard Henderson <[email protected]> wrote: > > R0078 specifies that base register, or base register plus immediate > offset, is unchecked when the base register is SP.
It looks like rule-numbers didn't make it into the final Arm ARM, so I guess the reference here would just be to section D6.8.1 ? Also, this phrasing is slightly ambiguous about whether the "when base is SP" condition applies to both "base register" and "base register + immediate", or just to the last of the two; the correct reading is the latter of these (and the D6.8.1 Arm ARM text is in error; trust the pseudocode here). We could perhaps say something like: D6.8.1 specifies that accesses are tag-unchecked for loads and stores (including exclusives, compare-and-swap, etc) whose addresses are: * base-register only, where the base register is SP * base-register plus immediate, where the base register is SP (not including reg+imm with writeback addressing forms) and also that literal (pc-relative) loads are tag-unchecked. > Signed-off-by: Richard Henderson <[email protected]> > --- > v2: Include writeback addresses as checked. The load-literal case is implicitly tag-unchecked because the address calculation doesn't go via clean_data_tbi(), right? Reviewed-by: Peter Maydell <[email protected]> thanks -- PMM
