On Tue, 5 Mar 2019 at 16:51, Peter Maydell <[email protected]> wrote: > > From: Richard Henderson <[email protected]> > > Tested-by: Laurent Desnogues <[email protected]> > Signed-off-by: Richard Henderson <[email protected]> > Message-id: [email protected] > Reviewed-by: Peter Maydell <[email protected]> > Signed-off-by: Peter Maydell <[email protected]>
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > index fcf79321e2f..9fe0844a828 100644 > --- a/target/arm/cpu64.c > +++ b/target/arm/cpu64.c > @@ -309,7 +309,7 @@ static void aarch64_max_initfn(Object *obj) > t = FIELD_DP64(t, ID_AA64ISAR0, SM4, 1); > t = FIELD_DP64(t, ID_AA64ISAR0, DP, 1); > t = FIELD_DP64(t, ID_AA64ISAR0, FHM, 1); > - t = FIELD_DP64(t, ID_AA64ISAR0, TS, 1); > + t = FIELD_DP64(t, ID_AA64ISAR0, TS, 2); /* v8.5-CondM */ > cpu->isar.id_aa64isar0 = t; > > t = cpu->isar.id_aa64isar1; Hi -- it's just been pointed out to me that if our 'max' CPU supports v8.5-CondM then we ought to be setting the HWCAP2_FLAGM2 bit in the hwcaps for linux-user mode. (Maybe we implemented this before the kernel defined the hwcap bit?) I guess we should also cross check whether there are any other recently introduced hwcap bits we now should be setting. thanks -- PMM
