On Mon, 5 Aug 2019 at 22:26, Richard Henderson <richard.hender...@linaro.org> wrote: > > On 8/5/19 8:44 AM, Peter Maydell wrote: > > On Fri, 26 Jul 2019 at 18:50, Richard Henderson > > <richard.hender...@linaro.org> wrote: > >> > >> This unifies the implementation of the actual instructions > >> for a32, t32, and t16. In order to make this happen, we > >> need several preliminary cleanups. Most importantly to how > >> we handle the architectural representation of PC. > > > > I'd be happy to take the preliminary-cleanups part (subject > > to the various review comments) without waiting for the > > rest of the series to get respun. > > I had an outstanding question re patch 4: > Message-ID: <c7a3ef78-d541-aa0a-21a5-8b4f48db1...@linaro.org> > https://lists.gnu.org/archive/html/qemu-devel/2019-07/msg06520.html > > and another re patch 6: > Message-ID: <09b930e2-0a92-25a3-4e26-8bea1f437...@linaro.org> > https://lists.gnu.org/archive/html/qemu-devel/2019-07/msg06508.html
I've followed up to 4, 6 and 7 giving some thoughts on those. Anywhere I've still not been very specific it's because I don't have a clear idea of the right thing, so use your own judgement :-) thanks -- PMM
