On 5/13/19 11:14 AM, Andrew Jones wrote:
>> Indeed, to me this seems to be the wrong kind of swabbing here. Exactly what
>> format is KVM expecting? Surely it should be the one used by the
>> unpredicated
>> LDR/STR instructions. Anything else would seem to be working against the
>> architecture.
>>
>> If so, the format is, architecturally, a stream of bytes in index order,
>> which
>> corresponds to a little-endian stream of words. So the loop I'd expect to
>> see
>> here is
>>
>> for (i = 0, n = cpu->sve_max_vq; i < n; ++i) {
>> d[i] = bswap64(q[i]);
>> }
>
> That's the opposite of what we do for fpsimd registers though. I'm
> fine with doing whatever KVM/TCG needs, but so far I was just following
> the same pattern we already have.
The behaviour of the hardware is different for LDR of fpsimd registers.
FP&SIMD LDR operates on datasize (8, 16, 32, 64, 128 bits).
SVE LDR always operates on bytes.
r~
