On 2/26/19 2:02 AM, David Gibson wrote:
> On Fri, Feb 22, 2019 at 02:13:16PM +0100, Cédric Le Goater wrote:
>> When the thread interrupt management state is retrieved from the KVM
>> VCPU, word2 is saved under the QEMU XIVE thread context to print out
>> the OS CAM line under the QEMU monitor.
>>
>> This breaks the migration of a TCG guest (and with KVM when
>> kernel_irqchip=off) because the matching algorithm of the presenter
>> relies on the OS CAM value. Fix with an extra reset of the thread
>> contexts to restore the expected value.
>>
>> Signed-off-by: Cédric Le Goater <[email protected]>
>
> As noted elsewhere, I'm not sure this is the right approach to fixing
> this. In any case this can be folded into the previous patch.
I have proposed an alternative in a response to :
[PATCH v2 04/13] spapr/xive: add state synchronization with KVM
C.
>
>> ---
>> hw/ppc/spapr_irq.c | 26 +++++++++++++++++++++++++-
>> 1 file changed, 25 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
>> index 12ecca6264f3..3176098b9f7c 100644
>> --- a/hw/ppc/spapr_irq.c
>> +++ b/hw/ppc/spapr_irq.c
>> @@ -356,7 +356,31 @@ static void
>> spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr,
>>
>> static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int
>> version_id)
>> {
>> - return spapr_xive_post_load(spapr->xive, version_id);
>> + CPUState *cs;
>> + int ret;
>> +
>> + ret = spapr_xive_post_load(spapr->xive, version_id);
>> + if (ret) {
>> + return ret;
>> + }
>> +
>> + /*
>> + * When the states are collected from the KVM XIVE device, word2
>> + * of the XiveTCTX is set to print out the OS CAM line under the
>> + * QEMU monitor.
>> + *
>> + * This breaks the migration on a TCG guest (or on KVM with
>> + * kernel_irqchip=off) because the matching algorithm of the
>> + * presenter relies on the OS CAM value. Fix with an extra reset
>> + * of the thread contexts to restore the expected value.
>> + */
>> + CPU_FOREACH(cs) {
>> + PowerPCCPU *cpu = POWERPC_CPU(cs);
>> +
>> + /* (TCG) Set the OS CAM line of the thread interrupt context. */
>> + spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx);
>> + }
>> + return 0;
>> }
>>
>> static void spapr_irq_reset_xive(sPAPRMachineState *spapr, Error **errp)
>
