There have been several announcements since the a72. The a75 and a76 entries are RFC because, while they boot with a 3.15 kernel, they do not boot with a 5.0-rc7 kernel. I'm really not sure where things have gone off the rails. It'll take some more serious tracing to figure out what went wrong.
I post this now mostly to get feedback on patch 5. Should we do more to elide *all* of the aa32 system registers for that case? r~ Richard Henderson (6): target/arm: Implement ID_PFR2 target/arm: Define cortex-a73 target/arm: Implement ID_AA64MMFR2 target/arm: Define cortex-a75 target/arm: Conditionalize DBGDIDR vs ID_AA64DFR0_EL1 assert target/arm: Define cortex-a76 target/arm/cpu.h | 18 +++++ hw/arm/virt.c | 3 + target/arm/cpu64.c | 179 +++++++++++++++++++++++++++++++++++++++++++- target/arm/helper.c | 66 ++++++++++------ target/arm/kvm64.c | 2 + 5 files changed, 240 insertions(+), 28 deletions(-) -- 2.17.2
