On Mon, 7 Jan 2019 at 10:10, Eric Auger <[email protected]> wrote: > > Let's report IO-coherent access is supported for translation > table walks, descriptor fetches and queues by setting the COHACC > override flag. Without that, we observe wrong command opcodes. > The DT description also advertises the dma coherency. > > Fixes a703b4f6c1ee ("hw/arm/virt-acpi-build: Add smmuv3 node in IORT table") > > Signed-off-by: Eric Auger <[email protected]> > Reported-by: Shameerali Kolothum Thodi <[email protected]> > Tested-by: Shameer Kolothum <[email protected]> > Reviewed-by: Andrew Jones <[email protected]> > > --- > v2 -> v3: > - added cpu_to_le32 > ---
Applied to target-arm.next, thanks. -- PMM
