Re: [Qemu-devel] [PATCH 20/28] target/riscv: Replace gen_load() with trans_load()

[Richard Henderson]

On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
> +static bool trans_load(DisasContext *ctx, arg_lb *a, int memop)

Again, gen_load.

>  {
> -    gen_load(ctx, OPC_RISC_LB, a->rd, a->rs1, a->imm);
> +    TCGv t0 = tcg_temp_new();
> +    TCGv t1 = tcg_temp_new();
> +    gen_get_gpr(t0, a->rs1);
> +    tcg_gen_addi_tl(t0, t0, a->imm);
> +
> +    if (memop < 0) {
> +        return false;
> +    }

This can't happen anymore.

Otherwise,
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


r~