Ping for code review, please?
thanks
-- PMM
On 23 August 2018 at 14:50, Peter Maydell <peter.mayd...@linaro.org> wrote:
> The ARMv8 architecture defines that an AArch32 CPU starts
> in SVC mode, unless EL2 is the highest available EL, in
> which case it starts in Hyp mode. (In ARMv7 a CPU with EL2
> but not EL3 was not a valid configuration, but we don't
> specifically reject this if the user asks for one.)
>
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
> ---
> target/arm/cpu.c | 14 ++++++++++++--
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 258ba6dcaad..b5e61cc1775 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -199,8 +199,18 @@ static void arm_cpu_reset(CPUState *s)
> env->cp15.c15_cpar = 1;
> }
> #else
> - /* SVC mode with interrupts disabled. */
> - env->uncached_cpsr = ARM_CPU_MODE_SVC;
> +
> + /*
> + * If the highest available EL is EL2, AArch32 will start in Hyp
> + * mode; otherwise it starts in SVC. Note that if we start in
> + * AArch64 then these values in the uncached_cpsr will be ignored.
> + */
> + if (arm_feature(env, ARM_FEATURE_EL2) &&
> + !arm_feature(env, ARM_FEATURE_EL3)) {
> + env->uncached_cpsr = ARM_CPU_MODE_HYP;
> + } else {
> + env->uncached_cpsr = ARM_CPU_MODE_SVC;
> + }
> env->daif = PSTATE_D | PSTATE_A | PSTATE_I | PSTATE_F;
>
> if (arm_feature(env, ARM_FEATURE_M)) {
> --
> 2.18.0
>
>
