This is a small cleanup to hide to the machine the gory details of the creation of the ISA bus. When time comes, the 'qemu_irq_handler' should become a LPC controller class attribute.
Signed-off-by: Cédric Le Goater <[email protected]> --- include/hw/ppc/pnv_lpc.h | 3 +-- hw/ppc/pnv.c | 15 +-------------- hw/ppc/pnv_lpc.c | 24 ++++++++++++++++++++---- 3 files changed, 22 insertions(+), 20 deletions(-) diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h index fddcb1c054b3..fb4b7b83d798 100644 --- a/include/hw/ppc/pnv_lpc.h +++ b/include/hw/ppc/pnv_lpc.h @@ -72,7 +72,6 @@ typedef struct PnvLpcController { bool primary; } PnvLpcController; -qemu_irq *pnv_lpc_isa_irq_create(PnvLpcController *lpc, int chip_type, - int nirqs); +ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, int chip_type); #endif /* _PPC_PNV_LPC_H */ diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index b419d3323100..d2126ee4affc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -521,22 +521,9 @@ static void pnv_reset(void) static ISABus *pnv_isa_create(PnvChip *chip) { - PnvLpcController *lpc = &chip->lpc; - ISABus *isa_bus; - qemu_irq *irqs; PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); - /* let isa_bus_new() create its own bridge on SysBus otherwise - * devices speficied on the command line won't find the bus and - * will fail to create. - */ - isa_bus = isa_bus_new(NULL, &lpc->isa_mem, &lpc->isa_io, - &error_fatal); - - irqs = pnv_lpc_isa_irq_create(lpc, pcc->chip_type, ISA_NUM_IRQS); - - isa_bus_irqs(isa_bus, irqs); - return isa_bus; + return pnv_lpc_isa_create(&chip->lpc, pcc->chip_type); } static void pnv_init(MachineState *machine) diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index 1e70c8c19d52..7c6c012d5176 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -22,6 +22,7 @@ #include "target/ppc/cpu.h" #include "qapi/error.h" #include "qemu/log.h" +#include "hw/isa/isa.h" #include "hw/ppc/pnv.h" #include "hw/ppc/pnv_lpc.h" @@ -546,16 +547,31 @@ static void pnv_lpc_isa_irq_handler(void *opaque, int n, int level) } } -qemu_irq *pnv_lpc_isa_irq_create(PnvLpcController *lpc, int chip_type, - int nirqs) +ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, int chip_type) { + ISABus *isa_bus; + qemu_irq *irqs; + qemu_irq_handler handler; + + /* let isa_bus_new() create its own bridge on SysBus otherwise + * devices speficied on the command line won't find the bus and + * will fail to create. + */ + isa_bus = isa_bus_new(NULL, &lpc->isa_mem, &lpc->isa_io, + &error_fatal); + /* Not all variants have a working serial irq decoder. If not, * handling of LPC interrupts becomes a platform issue (some * platforms have a CPLD to do it). */ if (chip_type == PNV_CHIP_POWER8NVL) { - return qemu_allocate_irqs(pnv_lpc_isa_irq_handler, lpc, nirqs); + handler = pnv_lpc_isa_irq_handler; } else { - return qemu_allocate_irqs(pnv_lpc_isa_irq_handler_cpld, lpc, nirqs); + handler = pnv_lpc_isa_irq_handler_cpld; } + + irqs = qemu_allocate_irqs(handler, lpc, ISA_NUM_IRQS); + + isa_bus_irqs(isa_bus, irqs); + return isa_bus; } -- 2.13.6
