Each interrupt mode has its own specific interrupt presenter object, that we store under the CPU object, one for XICS and one for XIVE.
Extend the sPAPR IRQ backend with a new handler to support them both. Signed-off-by: Cédric Le Goater <[email protected]> --- include/hw/ppc/spapr.h | 1 + include/hw/ppc/spapr_irq.h | 2 ++ include/hw/ppc/xive.h | 2 ++ hw/intc/xive.c | 21 +++++++++++++++++++++ hw/ppc/spapr_cpu_core.c | 4 ++-- hw/ppc/spapr_irq.c | 23 +++++++++++++++++++++++ 6 files changed, 51 insertions(+), 2 deletions(-) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 3c7bae874f91..223837882496 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -169,6 +169,7 @@ struct sPAPRMachineState { unsigned long *irq_map; const char *icp_type; sPAPRXive *xive; + const char *xive_tctx_type; bool cmd_line_caps[SPAPR_CAP_NUM]; sPAPRCapabilities def, eff, mig; diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index b070276c9abb..8046cbd83d61 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -44,6 +44,8 @@ typedef struct sPAPRIrq { void (*print_info)(sPAPRMachineState *spapr, Monitor *mon); void (*dt_populate)(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); + Object *(*cpu_intc_create)(sPAPRMachineState *spapr, Object *cpu, + Error **errp); } sPAPRIrq; extern sPAPRIrq spapr_irq_legacy; diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index e29b52eeb91f..378bd61c6d18 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -281,5 +281,7 @@ typedef struct XiveTCTX { extern const MemoryRegionOps xive_tm_ops; void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon); +Object *xive_tctx_create(Object *cpu, const char *type, XiveRouter *xrtr, + Error **errp); #endif /* PPC_XIVE_H */ diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 671ea1c6c36b..8d86f739522d 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -587,6 +587,27 @@ static const TypeInfo xive_tctx_info = { .class_init = xive_tctx_class_init, }; +Object *xive_tctx_create(Object *cpu, const char *type, XiveRouter *xrtr, + Error **errp) +{ + Error *local_err = NULL; + Object *obj; + + obj = object_new(type); + object_property_add_child(cpu, type, obj, &error_abort); + object_unref(obj); + object_property_add_const_link(obj, "cpu", cpu, &error_abort); + object_property_add_const_link(obj, "xive", OBJECT(xrtr), &error_abort); + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + object_unparent(obj); + error_propagate(errp, local_err); + return NULL; + } + + return obj; +} + /* * XIVE ESB helpers */ diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index f3e9b879b251..fe9bcfdf01c8 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -148,6 +148,7 @@ static void spapr_cpu_core_realize_child(Object *child, Error *local_err = NULL; CPUState *cs = CPU(child); PowerPCCPU *cpu = POWERPC_CPU(cs); + sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); object_property_set_bool(child, true, "realized", &local_err); if (local_err) { @@ -159,8 +160,7 @@ static void spapr_cpu_core_realize_child(Object *child, goto error; } - cpu->intc = icp_create(child, spapr->icp_type, XICS_FABRIC(spapr), - &local_err); + cpu->intc = smc->irq->cpu_intc_create(spapr, child, &local_err); if (local_err) { goto error; } diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index be71998777c2..266f7db3be7b 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -248,6 +248,12 @@ static void spapr_irq_dt_populate_legacy(sPAPRMachineState *spapr, spapr_dt_xics(nr_servers, fdt, phandle); } +static Object *spapr_irq_cpu_intc_create_legacy(sPAPRMachineState *spapr, + Object *cpu, Error **errp) +{ + return icp_create(cpu, spapr->icp_type, XICS_FABRIC(spapr), errp); +} + sPAPRIrq spapr_irq_legacy = { .nr_irqs = XICS_IRQS_SPAPR, .init = spapr_irq_init_legacy, @@ -258,6 +264,7 @@ sPAPRIrq spapr_irq_legacy = { .qirq = spapr_qirq_legacy, .print_info = spapr_irq_print_info_legacy, .dt_populate = spapr_irq_dt_populate_legacy, + .cpu_intc_create = spapr_irq_cpu_intc_create_legacy, }; /* @@ -473,6 +480,12 @@ static void spapr_irq_dt_populate_xics(sPAPRMachineState *spapr, spapr_irq_dt_populate_legacy(spapr, nr_servers, fdt, phandle); } +static Object *spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr, + Object *cpu, Error **errp) +{ + return spapr_irq_cpu_intc_create_legacy(spapr, cpu, errp); +} + /* * XICS IRQ number space * @@ -518,6 +531,7 @@ sPAPRIrq spapr_irq_xics = { .qirq = spapr_qirq_xics, .print_info = spapr_irq_print_info_xics, .dt_populate = spapr_irq_dt_populate_xics, + .cpu_intc_create = spapr_irq_cpu_intc_create_xics, }; /* @@ -582,6 +596,7 @@ static void spapr_irq_init_xive(sPAPRMachineState *spapr, uint32_t nr_servers, spapr_irq_alloc(spapr, SPAPR_IRQ_IPI, i, errp); } + spapr->xive_tctx_type = TYPE_XIVE_TCTX; spapr_xive_hcall_init(spapr); } @@ -683,6 +698,13 @@ static void spapr_irq_dt_populate_xive(sPAPRMachineState *spapr, spapr_dt_xive(spapr->xive, nr_servers, fdt, phandle); } +static Object *spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr, + Object *cpu, Error **errp) +{ + return xive_tctx_create(cpu, spapr->xive_tctx_type, + XIVE_ROUTER(spapr->xive), errp); +} + /* * XIVE IRQ number space * @@ -730,6 +752,7 @@ sPAPRIrq spapr_irq_xive = { .qirq = spapr_qirq_xive, .print_info = spapr_irq_print_info_xive, .dt_populate = spapr_irq_dt_populate_xive, + .cpu_intc_create = spapr_irq_cpu_intc_create_xive, }; /* -- 2.13.6
