From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
Respect MSR.PVR as read-only. We were wrongly overwriting the PVR bit.
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
---
target/microblaze/cpu.h | 4 +++-
target/microblaze/translate.c | 8 +-------
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 5be71bc320..0eb9e2b8e2 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -59,6 +59,8 @@ typedef struct CPUMBState CPUMBState;
#define SR_EDR 0xd
/* MSR flags. */
+#define MSR_PVR_SHIFT 10
+
#define MSR_BE (1<<0) /* 0x001 */
#define MSR_IE (1<<1) /* 0x002 */
#define MSR_C (1<<2) /* 0x004 */
@@ -69,7 +71,7 @@ typedef struct CPUMBState CPUMBState;
#define MSR_DCE (1<<7) /* 0x080 */
#define MSR_EE (1<<8) /* 0x100 */
#define MSR_EIP (1<<9) /* 0x200 */
-#define MSR_PVR (1<<10) /* 0x400 */
+#define MSR_PVR (1 << MSR_PVR_SHIFT)
#define MSR_CC (1<<31)
/* Machine State Register (MSR) Fields */
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 7628b0e25b..df62563815 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -417,15 +417,9 @@ static inline void msr_read(DisasContext *dc, TCGv d)
static inline void msr_write(DisasContext *dc, TCGv v)
{
- TCGv t;
-
- t = tcg_temp_new();
dc->cpustate_changed = 1;
/* PVR bit is not writable. */
- tcg_gen_andi_tl(t, v, ~MSR_PVR);
- tcg_gen_andi_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], MSR_PVR);
- tcg_gen_or_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], v);
- tcg_temp_free(t);
+ tcg_gen_deposit_tl(cpu_SR[SR_MSR], v, cpu_SR[SR_MSR], MSR_PVR_SHIFT, 1);
}
static void dec_msr(DisasContext *dc)
--
2.14.1
