Performance improvement for SPEC06fp for the last few commits:
qemu-aarch64 SPEC06fp (test set) speedup over QEMU
4c2c1015905
Host: Intel(R) Core(TM) i7-6700K CPU @
4.00GHz
error bars: 95% confidence interval
6
+-+---+-----+-----+-----+----+-----+-----+-----+-----+-----+-----+-----+-----+-----+----+-----+-----+-----+---+-+
5
+-+..........................+++..............................................................................+-+
4
+-+...........................@@=+..............................................................+addsub
+-+
3
+-+........+++++.+++++........@@=+............+++++...............+++........................+++++++++++
+-+
| +%@&+ |&& %%@&+ +%%@= +%%&=++%%&= +%%&= +++ +++++
++++++%%@=++%%&= +%%&= ++++ |
2
+-+..+%@&++%%@&.+%%@&+$$%@=+#$%@=+#$%&=##$%&=*#$%&=.+%@&=...+==##%@&++%%@&+++++++$$%@=**$%@=*#$%&=*+f%&=##$@&=+-+
1
+-+**#$@&**#%@&**#%@&**$%@=**$%@=**$%&=*#$%&=*#$%&**#$@&**#$@&**#%@&**#%@&**#%@=**$%@=**$%@=*#$%&=+sqr&=*#$@&=+-+
0
+-+**#$@&**#%@&**#%@&**$%@=**$%@=**$%&=*#$%&=*#$%&**#$@&**#$@&**#%@&**#%@&**#%@=**$%@=**$%@=*#$%&=*+cm&=*#$@&=+-+
416.game433.434.435.436.cac437.leslie444.447.de450.so453.454.ca459.GemsF465.ton470.lb48482.sph+f32f64ean
qemu-aarch64 NBench score; higher is
better
Host: Intel(R) Core(TM) i7-6700K CPU @
4.00GHz
16
+-+-------------------+---------------------+----------------------+---------------------+-------------------+-+
14
+-+..........................................+++++++***............+++..+++++................................+-+
12
+-+.........................................@@@@&&===+*............@@@&&&==**..................+before
+-+
10
+-+.........................................@..@.&..=.*............@.@..&.=.*............@@@&&&==***ub
+-+
8
+-+.....................................++++@..@.&..=.*............@.@..&.=.*............@+@..&+=
+*ul +-+
6
+-+...................@@@@&&===**..++###$$$%%..@.&..=.*..***###$$++@.@..&.=.*.......$$$%%%.@..&+=
+*iv +-+
4
+-+............###$$$%%..@.&..=.*..***.#..$.%..@.&..=.*..*+*..#+$%%%.@..&.=.*..***###+$++%.@..&+=
+*ma +-+
2
+-+.........****.#..$.%..@.&..=.*..*.*.#..$.%..@.&..=.*..*.*..#.$..%.@..&.=.*..*.*..#.$..%.@..&+=+s*rt
+-+
0
+-+---------****##$$$%%@@@&&===**--***##$$$%%@@@&&===**--***###$$%%%@@&&&==**--***###$$%%%@@&&&==***mp-------+-+
FOURIER NEURAL NET LU DECOMPOSITION
gmean +f32f64
Images in png: https://imgur.com/a/rkuZW
Signed-off-by: Emilio G. Cota <[email protected]>
---
fpu/softfloat.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 2b86d73..d0f1f65 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -3660,7 +3660,8 @@ float128 uint64_to_float128(uint64_t a, float_status
*status)
| Arithmetic.
*----------------------------------------------------------------------------*/
-float64 float32_to_float64(float32 a, float_status *status)
+static float64 __attribute__((noinline))
+soft_float32_to_float64(float32 a, float_status *status)
{
flag aSign;
int aExp;
@@ -3685,6 +3686,20 @@ float64 float32_to_float64(float32 a, float_status
*status)
}
+float64 float32_to_float64(float32 a, float_status *status)
+{
+ if (likely(float32_is_normal(a))) {
+ float f = *(float *)&a;
+ double r = f;
+
+ return *(float64 *)&r;
+ } else if (float32_is_zero(a)) {
+ return float64_set_sign(float64_zero, float32_is_neg(a));
+ } else {
+ return soft_float32_to_float64(a, status);
+ }
+}
+
/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
| `a' to the extended double-precision floating-point format. The conversion
--
2.7.4
