On 03/26/2018 02:56 PM, Max Filippov wrote: > The value of CCOUNT special register is calculated as time elapsed > since CCOUNT == 0 multiplied by the core frequency. In icount mode time > increment between consecutive instructions that don't involve time > warps is constant, but unless the result of multiplication of this > constant by the core frequency is a whole number the CCOUNT increment > between these instructions may not be constant. E.g. with icount=7 each > instruction takes 128ns, with core clock of 10MHz CCOUNT values for > consecutive instructions are: > > 502: (128 * 502 * 10000000) / 1000000000 = 642.56 > 503: (128 * 503 * 10000000) / 1000000000 = 643.84 > 504: (128 * 504 * 10000000) / 1000000000 = 645.12 > > I.e.the CCOUNT increments depend on the absolute time. This results in > varying CCOUNT differences for consecutive instructions in tests that > involve time warps and don't set CCOUNT explicitly. > > Change frequency of the core used in tests so that clock cycle takes > exactly 64ns. Change icount power used in tests to 6, so that each > instruction takes exactly 1 clock cycle. With these changes CCOUNT > increments only depend on the number of executed instructions and that's > what timer tests expect, so they work correctly. > > Longer story: > http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg04326.html > > Cc: Pavel Dovgaluk <[email protected]> > Cc: Philippe Mathieu-Daudé <[email protected]> > Signed-off-by: Max Filippov <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]> > --- > Changes v1->v2: > - expand changelog; > - replace clock_freq_khz initializer constant with a more meaningful > expression. Thanks :) > > target/xtensa/core-dc232b.c | 2 +- > tests/tcg/xtensa/Makefile | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/xtensa/core-dc232b.c b/target/xtensa/core-dc232b.c > index aa07018af4e7..7331eeea2fb6 100644 > --- a/target/xtensa/core-dc232b.c > +++ b/target/xtensa/core-dc232b.c > @@ -47,7 +47,7 @@ static XtensaConfig dc232b __attribute__((unused)) = { > } > }, > .isa_internal = &xtensa_modules, > - .clock_freq_khz = 10000, > + .clock_freq_khz = (NANOSECONDS_PER_SECOND / 64) / 1000, > DEFAULT_SECTIONS > }; > > diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile > index 2882c431e4a9..091518c05583 100644 > --- a/tests/tcg/xtensa/Makefile > +++ b/tests/tcg/xtensa/Makefile > @@ -5,7 +5,7 @@ CROSS=xtensa-$(CORE)-elf- > > ifndef XT > SIM = ../../../xtensa-softmmu/qemu-system-xtensa > -SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 7 $(EXTFLAGS) > -kernel > +SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) > -kernel > SIMDEBUG = -s -S > else > SIM = xt-run >
