On 19 January 2018 at 04:54, Richard Henderson
<[email protected]> wrote:
> Add both SVE exception state and vector length.
>
> Signed-off-by: Richard Henderson <[email protected]>
> @@ -11772,14 +11772,35 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
> target_ulong *pc,
> target_ulong *cs_base, uint32_t *pflags)
> {
> ARMMMUIdx mmu_idx = core_to_arm_mmu_idx(env, cpu_mmu_index(env, false));
> + int fp_el = fp_exception_el(env);
> uint32_t flags;
>
> if (is_a64(env)) {
> + int sve_el = sve_exception_el(env);
> + uint32_t zcr_len;
> +
> *pc = env->pc;
> flags = ARM_TBFLAG_AARCH64_STATE_MASK;
> /* Get control bits for tagged addresses */
> flags |= (arm_regime_tbi0(env, mmu_idx) << ARM_TBFLAG_TBI0_SHIFT);
> flags |= (arm_regime_tbi1(env, mmu_idx) << ARM_TBFLAG_TBI1_SHIFT);
> + flags |= sve_el << ARM_TBFLAG_SVEEXC_EL_SHIFT;
> +
> + /* If SVE is disabled, but FP is enabled,
> + then the effective len is 0. */
> + if (sve_el != 0 && fp_el == 0) {
> + zcr_len = 0;
> + } else {
> + int highest_el = arm_highest_el(env);
> + int current_el = arm_current_el(env);
> + int i;
> +
> + zcr_len = 0xf & (uint32_t)env->vfp.zcr_el[highest_el];
> + for (i = highest_el - 1; i >= MAX(1, current_el); --i) {
> + zcr_len = MIN(zcr_len, 0xf & (uint32_t)env->vfp.zcr_el[i]);
> + }
This loop also doesn't consider the case of EL3 implemented but
EL2 not, I think.
thanks
-- PMM
