On 09/11/2017 02:12 AM, Alex Bennée wrote: > > Richard Henderson <[email protected]> writes: > >> On 09/07/2017 09:58 AM, Alex Bennée wrote: >>>> + switch (size + 4 * is_u) { >>> >>> Hmm I find this switch a little too magical. I mean I can see that the >>> encoding abuses size for the final opcode when I look at the manual but >>> it reads badly. >>> >>>> + case 0: /* AND */ >>>> + gvec_op = tcg_gen_gvec_and8; >>>> + goto do_gvec; >>>> + case 1: /* BIC */ >>>> + gvec_op = tcg_gen_gvec_andc8; >>>> + goto do_gvec; >>>> + case 2: /* ORR */ >>>> + gvec_op = tcg_gen_gvec_or8; >>>> + goto do_gvec; >>>> + case 3: /* ORN */ >>>> + gvec_op = tcg_gen_gvec_orc8; >>>> + goto do_gvec; >>>> + case 4: /* EOR */ >>>> + gvec_op = tcg_gen_gvec_xor8; >>>> + goto do_gvec; >>>> + do_gvec: >>>> + gvec_op(vec_full_reg_offset(s, rd), >>>> + vec_full_reg_offset(s, rn), >>>> + vec_full_reg_offset(s, rm), >>>> + is_q ? 16 : 8, vec_full_reg_size(s)); >>>> + return; >>> >>> No default case (although I guess we just fall through). What's wrong >>> with just having a !is_u test with gvec_op = tbl[size] and skipping all >>> the goto stuff? >> >> Because that would still leave EOR out in the woods. >> I do think this is the cleanest way to filter out these 5 operations. > > Is this going to look better if the other operations in this branch of > the decode are converted as well?
It might do. I'll have to think about those some more. Indeed, perhaps that's exactly what I ought to do. Those are complex logical operations which certainly will not get their own opcodes, but are "simple" in that they can be implemented in terms of vector xor+and, so there's no reason we couldn't expand those inline for all vector supporting hosts. r~
