Hi Peter,
On 30/05/2017 18:01, Peter Maydell wrote:
> On 13 May 2017 at 18:43, Eric Auger <eric.au...@redhat.com> wrote:
>> From: Prem Mallappa <prem.malla...@broadcom.com>
>>
>> Introduces the SMMUv3 derived model. This is based on
>> System MMUv3 specification (v17).
>>
>> Signed-off-by: Prem Mallappa <prem.malla...@broadcom.com>
>> Signed-off-by: Eric Auger <eric.au...@redhat.com>
>>
>> ---
>> v3 -> v4
>> - smmu_irq_update
>> - fix hash key allocation
>> - set smmu_iommu_ops
>> - set SMMU_REG_CR0,
>> - smmuv3_translate: ret.perm not set in bypass mode
>> - use trace events
>> - renamed STM2U64 into L1STD_L2PTR and STMSPAN into L1STD_SPAN
>> - rework smmu_find_ste
>> - fix tg2granule in TT0/0b10 corresponds to 16kB
>>
>> v2 -> v3:
>> - move creation of include/hw/arm/smmuv3.h to this patch to fix compil issue
>> - compilation allowed
>> - fix sbus allocation in smmu_init_pci_iommu
>> - restructure code into headers
>> - misc cleanups
>> ---
>> hw/arm/Makefile.objs | 2 +-
>> hw/arm/smmuv3-internal.h | 603 ++++++++++++++++++++++++
>> hw/arm/smmuv3.c | 1134
>> ++++++++++++++++++++++++++++++++++++++++++++++
>> hw/arm/trace-events | 32 ++
>> include/hw/arm/smmuv3.h | 87 ++++
>> 5 files changed, 1857 insertions(+), 1 deletion(-)
>> create mode 100644 hw/arm/smmuv3-internal.h
>> create mode 100644 hw/arm/smmuv3.c
>> create mode 100644 include/hw/arm/smmuv3.h
>
> This is a bit of a big patch for review for my taste -- are
> there some easy splits into multiple patches possible?
Yes I fully understand. I will try to split it to ease the review. Maybe
I first need to reach a decent level of functionality first and then
split it.
>
>> +typedef struct SMMUQueue {
>> + hwaddr base;
>> + uint32_t prod;
>> + uint32_t cons;
>> + union {
>> + struct {
>> + uint8_t prod:1;
>> + uint8_t cons:1;
>> + };
>> + uint8_t unused;
>> + } wrap;
>
> Use of bitfields here seems a bit odd but I haven't
> looked at the code really.
OK. I will further look at this part.
Thanks
Eric
>
> thanks
> -- PMM
>
