Each thread of a core is linked to an ICP. This allocates a PnvICPState object when the PowerPCCPU object is realized and lets the XICSFabric do the store under the 'intc' backlink when xics_cpu_setup() is called.
This modeling removes the need of maintaining an array of ICP objects under the PowerNV machine and also simplifies the XICSFabric icp_get() handler. Signed-off-by: Cédric Le Goater <c...@kaod.org> --- Changes since v3: - removed the array of ICP objects from under the PowerNV machine and handled the allocation of the PnvICPState object for each thread when the PowerPCCPU object is realized. hw/ppc/pnv.c | 2 ++ hw/ppc/pnv_core.c | 30 ++++++++++++++++++++++++++---- 2 files changed, 28 insertions(+), 4 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 3fa722af82e6..9505ca7dc09a 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -691,6 +691,8 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(pnv_core), pcc->core_pir(chip, core_hwid), "pir", &error_fatal); + object_property_add_const_link(OBJECT(pnv_core), "xics", + qdev_get_machine(), &error_fatal); object_property_set_bool(OBJECT(pnv_core), true, "realized", &error_fatal); object_unref(OBJECT(pnv_core)); diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index d79d530b4881..87686a1b9e3b 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -25,6 +25,7 @@ #include "hw/ppc/pnv.h" #include "hw/ppc/pnv_core.h" #include "hw/ppc/pnv_xscom.h" +#include "hw/ppc/xics.h" static void powernv_cpu_reset(void *opaque) { @@ -43,12 +44,14 @@ static void powernv_cpu_reset(void *opaque) env->msr |= MSR_HVB; /* Hypervisor mode */ } -static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp) +static void powernv_cpu_init(PowerPCCPU *cpu, XICSFabric *xi, Error **errp) { CPUPPCState *env = &cpu->env; int core_pir; int thread_index = 0; /* TODO: TCG supports only one thread */ ppc_spr_t *pir = &env->spr_cb[SPR_PIR]; + Object *obj; + Error *local_err = NULL; core_pir = object_property_get_int(OBJECT(cpu), "core-pir", &error_abort); @@ -63,6 +66,17 @@ static void powernv_cpu_init(PowerPCCPU *cpu, Error **errp) cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ); qemu_register_reset(powernv_cpu_reset, cpu); + + obj = object_new(TYPE_PNV_ICP); + object_property_add_child(OBJECT(cpu), "icp", obj, NULL); + object_property_add_const_link(obj, "xics", OBJECT(xi), &error_abort); + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + xics_cpu_setup(xi, cpu, ICP(obj)); } /* @@ -110,7 +124,7 @@ static const MemoryRegionOps pnv_core_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -static void pnv_core_realize_child(Object *child, Error **errp) +static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **errp) { Error *local_err = NULL; CPUState *cs = CPU(child); @@ -122,7 +136,7 @@ static void pnv_core_realize_child(Object *child, Error **errp) return; } - powernv_cpu_init(cpu, &local_err); + powernv_cpu_init(cpu, xi, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -140,6 +154,14 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) void *obj; int i, j; char name[32]; + Object *xi; + + xi = object_property_get_link(OBJECT(dev), "xics", &local_err); + if (!xi) { + error_setg(errp, "%s: required link 'xics' not found: %s", + __func__, error_get_pretty(local_err)); + return; + } pc->threads = g_malloc0(size * cc->nr_threads); for (i = 0; i < cc->nr_threads; i++) { @@ -160,7 +182,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) for (j = 0; j < cc->nr_threads; j++) { obj = pc->threads + j * size; - pnv_core_realize_child(obj, &local_err); + pnv_core_realize_child(obj, XICS_FABRIC(xi), &local_err); if (local_err) { goto err; } -- 2.7.4