Hello, Here is a series adding support for the interrupt controller as found on a POWER8 system. POWER9 uses a different interrupt controller called XIVE, still to be worked on.
The initial patches are more cleanups of the XICS layer which move the IRQ 'server' number mapping under the machine handlers. A new PnvICPState object based on MMIOs, which is specific to PowerNV, is introduced in XICS. These ICP objects are created for each thread of a core and linked to the associated PowerPCCPU object. Finally, to make use of the XICS layer, the PowerNV machine is extended with a QOM XICSFabric interface and with a global memory region acting as the Interrupt Management area. To test, grab a kernel and a rootfs image here : https://openpower.xyz/job/openpower-op-build/distro=ubuntu,target=palmetto/lastSuccessfulBuild/artifact/images/zImage.epapr https://openpower.xyz/job/openpower-op-build/distro=ubuntu,target=palmetto/lastSuccessfulBuild/artifact/images/rootfs.cpio.xz The full patchset is available here : https://github.com/legoater/qemu/commits/powernv-ipmi-2.9 Thanks, C. Changes since v3: - renamed 'icp' backlink to a more generic name 'intc' - removed the array of ICP objects from under the PowerNV machine and handled the allocation of the PnvICPState object for each thread when the PowerPCCPU object is realized. Changes since v2: - removed the ICS list from the PowerNV machine - changed the 'icp' backlink type to be an 'Object' Changes since v1: - introduced PnvICPState to hold the ICP memory region - handled pir-to-cpu_index mapping under the machine icp_get handler - added multichip support - removed ics_eoi handler (came from a bug in PHB3_MSI) - kept PSI and OCC model for later, when this part is done. Cédric Le Goater (9): ppc/xics: introduce an 'intc' backlink under PowerPCCPU spapr: move the IRQ server number mapping under the machine ppc/xics: add a realize() handler to ICPStateClass ppc/pnv: add a PnvICPState object ppc/pnv: create the ICP object under PnvCore ppc/pnv: add a helper to calculate MMIO addresses registers ppc/pnv: extend the machine with a XICSFabric interface ppc/pnv: extend the machine with a InterruptStatsProvider interface ppc/pnv: add memory regions for the ICP registers hw/intc/Makefile.objs | 1 + hw/intc/xics.c | 11 ++- hw/intc/xics_pnv.c | 180 ++++++++++++++++++++++++++++++++++++++++++++++++ hw/intc/xics_spapr.c | 25 ++----- hw/ppc/pnv.c | 142 ++++++++++++++++++++++++++++++++++++++ hw/ppc/pnv_core.c | 30 ++++++-- hw/ppc/spapr.c | 3 +- hw/ppc/spapr_cpu_core.c | 4 +- include/hw/ppc/pnv.h | 31 ++++++++- include/hw/ppc/xics.h | 15 +++- target/ppc/cpu.h | 1 + 11 files changed, 414 insertions(+), 29 deletions(-) create mode 100644 hw/intc/xics_pnv.c -- 2.7.4
