On 01/24/2017 05:52 PM, Andrea Bolognani wrote:
On Mon, 2017-01-23 at 21:20 +0200, Marcel Apfelbaum wrote:v2 -> v3: - Keep only the root port base class code in pcie_root_port.c (Michael) - Use msix for the generic root port implementation (Michael and Gerd) - The task required some refactoring like having some common init/uninit interrupts functions to be implemented by both generic and Intel Root Ports.v1 -> v2: - Rebased on master. The Generic Root Port behaves the same as the Intel's IOH device with id 3420, without having Intel specific attributes. The device has two purposes: (1) Can be used on both X86 and ARM machines. (2) It will allow us to tweak the behaviour (e.g add vendor-specific PCI capabilities) - something that obviously cannot be done on a known device. Patch 1/3: Introduce a base class for Root Ports - most of the code is migrated from IOH3420 implementation. Patch 2/3: Derives the IOH3420 from the new base class Patch 3/3: Introduces the generic Root Port. Tested with Linux and Windows guests only on x86 hosts.(on aarch64, Fedora guest) Tested-by: Andrea Bolognani <abolo...@redhat.com>
Much appreciated! Marcel
