On 25 October 2016 at 07:49, P J P <[email protected]> wrote: > From: Prasad J Pandit <[email protected]> > > The Cadence UART device emulator stores 'baud rate generator' > and 'baud rate divider' values, used in computing speed, in two > registers. The device specification defines their range and > their reset value. Use their correct value when resetting the > device in cadence_uart_reset. > > Signed-off-by: Prasad J Pandit <[email protected]> > --- > hw/char/cadence_uart.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c > index c176446..b8d4c28 100644 > --- a/hw/char/cadence_uart.c > +++ b/hw/char/cadence_uart.c > @@ -471,7 +471,8 @@ static void cadence_uart_reset(DeviceState *dev) > s->r[R_IMR] = 0; > s->r[R_CISR] = 0; > s->r[R_RTRIG] = 0x00000020; > - s->r[R_BRGR] = 0x0000000F; > + s->r[R_BRGR] = 0x0000028B; > + s->r[R_BDIV] = 0x0000000F; > s->r[R_TTRIG] = 0x00000020; > > uart_rx_reset(s); > -- > 2.7.4
I'm going to wait for a review/ack from one of the Xilinx folk before putting this in target-arm.next. thanks -- PMM
