On Thu, Jul 14, 2016 at 04:20:20PM -0400, Pranith Kumar wrote: > Cc: Alexander Graf <[email protected]> > Signed-off-by: Pranith Kumar <[email protected]> > Signed-off-by: Richard Henderson <[email protected]> > --- > tcg/s390/tcg-target.inc.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c > index 5a7495b..01aae35 100644 > --- a/tcg/s390/tcg-target.inc.c > +++ b/tcg/s390/tcg-target.inc.c > @@ -343,6 +343,7 @@ static tcg_insn_unit *tb_ret_addr; > #define FACILITY_EXT_IMM (1ULL << (63 - 21)) > #define FACILITY_GEN_INST_EXT (1ULL << (63 - 34)) > #define FACILITY_LOAD_ON_COND (1ULL << (63 - 45)) > +#define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND > > static uint64_t facilities; > > @@ -2172,6 +2173,15 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode > opc, > tgen_deposit(s, args[0], args[2], args[3], args[4]); > break; > > + case INDEX_op_mb: > + /* The host memory model is quite strong, we simply need to > + serialize the instruction stream. */ > + if (args[0] == TCG_MO_ALL || args[0] == TCG_MO_ST_LD) { > + tcg_out_insn(s, RR, BCR, > + facilities & FACILITY_FAST_BCR_SER ? 14 : 15, 0); > + }
args[0] == TCG_MO_ALL is always false since frontends bitwise-OR
TCG_BAR_SC.
Did you mean:
switch (args[0] & TCG_MO_ALL) {
case TCG_MO_ALL: /* fall-through */
case TCG_MO_ST_LD:
tcg_out_insn(s, RR, BCR,
facilities & FACILITY_FAST_BCR_SER ? 14 : 15, 0);
break;
}
?
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