On 10/01/2016 05:05 AM, Artyom Tarasenko wrote:
+ switch ((addr >> 3) & 0x3) {
+ case 1:
+ env->dmmu.mmu_primary_context = val;
+ env->immu.mmu_primary_context = val;
+ /* can be optimized to only flush MMU_USER_PRIMARY_IDX
+ and MMU_KERNEL_PRIMARY_IDX entries */
+ tlb_flush(CPU(cpu), 1);
This is easy to do with
tlb_flush_by_mmuidx(CPU(cpu), MMU_USER_IDX, MMU_KERNEL_IDX, -1);
etc. And it does seem like it would be helpful to avoid flushing MMU_HYPV_IDX
(or MMU_PHYS_IDX as I would rename it).
r~
