On 04/10/2016 06:03, David Kiarie wrote: > Signed-off-by: David Kiarie <[email protected]> > --- > hw/i386/amd_iommu.c | 22 +++++++++++++--------- > 1 file changed, 13 insertions(+), 9 deletions(-) > > diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c > index 023de52..47b79d9 100644 > --- a/hw/i386/amd_iommu.c > +++ b/hw/i386/amd_iommu.c > @@ -143,10 +143,10 @@ static void amdvi_assign_andq(AMDVIState *s, hwaddr > addr, uint64_t val) > > static void amdvi_generate_msi_interrupt(AMDVIState *s) > { > - MSIMessage msg; > - MemTxAttrs attrs; > - > - attrs.requester_id = pci_requester_id(&s->pci.dev); > + MSIMessage msg = {}; > + MemTxAttrs attrs = { > + .requester_id = pci_requester_id(&s->pci.dev) > + }; > > if (msi_enabled(&s->pci.dev)) { > msg = msi_get_message(&s->pci.dev, 0); > @@ -185,7 +185,7 @@ static void amdvi_setevent_bits(uint64_t *buffer, > uint64_t value, int start, > int length) > { > int index = start / 64, bitpos = start % 64; > - uint64_t mask = ((1 << length) - 1) << bitpos; > + uint64_t mask = MAKE_64BIT_MASK(start, length); > buffer[index] &= ~mask; > buffer[index] |= (value << bitpos) & mask; > } > @@ -333,8 +333,8 @@ static void amdvi_update_iotlb(AMDVIState *s, uint16_t > devid, > uint64_t gpa, IOMMUTLBEntry to_cache, > uint16_t domid) > { > - AMDVIIOTLBEntry *entry = g_malloc(sizeof(*entry)); > - uint64_t *key = g_malloc(sizeof(key)); > + AMDVIIOTLBEntry *entry = g_new(AMDVIIOTLBEntry, 1); > + uint64_t *key = g_new(uint64_t, 1); > uint64_t gfn = gpa >> AMDVI_PAGE_SHIFT_4K; > > /* don't cache erroneous translations */ > @@ -1135,6 +1135,7 @@ static void amdvi_reset(DeviceState *dev) > > static void amdvi_realize(DeviceState *dev, Error **err) > { > + int ret = 0; > AMDVIState *s = AMD_IOMMU_DEVICE(dev); > X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev); > PCIBus *bus = PC_MACHINE(qdev_get_machine())->bus; > @@ -1147,8 +1148,11 @@ static void amdvi_realize(DeviceState *dev, Error > **err) > object_property_set_bool(OBJECT(&s->pci), true, "realized", err); > s->capab_offset = pci_add_capability(&s->pci.dev, AMDVI_CAPAB_ID_SEC, 0, > AMDVI_CAPAB_SIZE); > - pci_add_capability(&s->pci.dev, PCI_CAP_ID_MSI, 0, AMDVI_CAPAB_REG_SIZE); > - pci_add_capability(&s->pci.dev, PCI_CAP_ID_HT, 0, AMDVI_CAPAB_REG_SIZE); > + assert(s->capab_offset > 0); > + ret = pci_add_capability(&s->pci.dev, PCI_CAP_ID_MSI, 0, > AMDVI_CAPAB_REG_SIZE); > + assert(ret > 0); > + ret = pci_add_capability(&s->pci.dev, PCI_CAP_ID_HT, 0, > AMDVI_CAPAB_REG_SIZE); > + assert(ret > 0); > > /* set up MMIO */ > memory_region_init_io(&s->mmio, OBJECT(s), &mmio_mem_ops, s, > "amdvi-mmio", >
Queued, thanks. Paolo
