On 28.09.2016 07:31, Nikunj A Dadhania wrote: > This series contains 7 new instructions for POWER9 ISA3.0 > Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x. > > GCC was adding epilogue for every VSX instructions causing change in > behaviour. For testing the load vector instructions used mfvsrld/mfvsrd > for loading vsr to register. And for testing store vector, used mtvsrdd > instructions. This helped in getting rid of the epilogue added by gcc. Tried > adding the test cases to kvm-unit-tests, but executing vsx instructions > results in cpu exception. Will debug that later. I will send the test code > and steps to execute as reply to this email.
Did you enable the VEC bit in the MSR before trying to run your instruction in a kvm-unit-test? If not, that might be the cause. Alternatively, there is also a tests/tcg/ folder in QEMU ... you could add a tests/tcg/ppc64 subfolder there. Thomas
