On 05/27/2016 06:41 AM, Thomas Huth wrote: > On 27.05.2016 05:38, David Gibson wrote: >> On Tue, May 03, 2016 at 06:03:29PM +0200, Cédric Le Goater wrote: >>> From: Benjamin Herrenschmidt <[email protected]> >>> >>> We use an env. flag which is set to the initial value of MSR_HVB in >>> the msr_mask. We also adjust the POWER8 mask to set SHV. >>> >>> Also use this to adjust ctx.hv so that it is *set* when the processor >>> doesn't have an HV mode (970 with Apple mode for example), thus enabling >>> hypervisor instructions/SPRs. >>> >>> Signed-off-by: Benjamin Herrenschmidt <[email protected]> >>> Reviewed-by: David Gibson <[email protected]> >>> --- >>> target-ppc/cpu.h | 4 ++++ >>> target-ppc/translate.c | 4 +++- >>> target-ppc/translate_init.c | 21 ++++++++++++++++----- >>> 3 files changed, 23 insertions(+), 6 deletions(-) > ... >>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c >>> index 10a92fdbbdd7..df656e6021b4 100644 >>> --- a/target-ppc/translate_init.c >>> +++ b/target-ppc/translate_init.c >>> @@ -8579,7 +8579,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) >>> PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | >>> PPC2_TM; >>> pcc->msr_mask = (1ull << MSR_SF) | >>> - (1ull << MSR_TM) | >>> + (1ull << MSR_SHV) | >>> + (1ull << MSR_TM) | >>> (1ull << MSR_VR) | >>> (1ull << MSR_VSX) | >>> (1ull << MSR_EE) | > > This indentation looks somewhat suspicious ... and indeed, checkpatch > compains here: > > ERROR: code indent should never use tabs > #153: FILE: target-ppc/translate_init.c:8583: > +^I^I (1ull << MSR_TM) |$ > > total: 1 errors, 0 warnings, 60 lines checked > > Please fix it to use spaces instead.
Sure. I will. Thanks for checking. A couple of other patches for PowerNV are in the same state. Sometimes I wish I had a reasonable 'indent' command line. C.
