On 25/03/16 12:50, Aleksandar Markovic wrote:
>
> /*----------------------------------------------------------------------------
> | The pattern for a default generated single-precision NaN.
>
> *----------------------------------------------------------------------------*/
> +float32 float32_default_nan(float_status *status) {
> #if defined(TARGET_SPARC)
> -const float32 float32_default_nan = const_float32(0x7FFFFFFF);
> + return const_float32(0x7FFFFFFF);
> #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) ||
> \
> defined(TARGET_XTENSA) || defined(TARGET_S390X) ||
> defined(TARGET_TRICORE)
> -const float32 float32_default_nan = const_float32(0x7FC00000);
> -#elif SNAN_BIT_IS_ONE
> -const float32 float32_default_nan = const_float32(0x7FBFFFFF);
> + return const_float32(0x7FC00000);
> #else
> -const float32 float32_default_nan = const_float32(0xFFC00000);
> + if (status->snan_bit_is_one)
> + return const_float32(0x7FBFFFFF);
> + else
> + return const_float32(0xFFC00000);
Here for MIPS (when FCR31.NAN2008 is set) we should generate 0x7FC00000
for single-precision. Reference:
"MIPS Architecture For Programmers, Volume I-A: Introduction to the
MIPS64 Architecture", Imagination Technologies LTD., Document Number:
MD00083, Revision 6.01, August 20, 2014, Table 6.3 "Value Supplied When
a New Quiet NaN Is Created", p. 84
Also, for double-precision we should generate 0x7FF8000000000000.
Thanks,
Leon
