On Mar 17, 2016 4:33 AM, "Peter Maydell" <[email protected]> wrote: > > Wire up the CPU timer interrupts in the right order, with the > nonsecure physical timer on cntpnsirq, the hyp timer on cnthpirq, > and the secure physical timer on cntpsirq. (We did get the > virt timer right, at least.) > > Reported-by: Antonio Huete Jiménez <[email protected]> > Signed-off-by: Peter Maydell <[email protected]> > --- > hw/arm/bcm2836.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c > index 89a6b35..1cefe41 100644 > --- a/hw/arm/bcm2836.c > +++ b/hw/arm/bcm2836.c > @@ -136,9 +136,13 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) > > /* Connect timers from the CPU to the interrupt controller */ > qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS, > - qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); > + qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n)); > qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT, > qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n)); > + qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP, > + qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n)); > + qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC, > + qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); > } > } > > -- > 1.9.1 > >
What drives the order?
