On Thu, Jan 7, 2016 at 11:22 AM, Peter Maydell <[email protected]> wrote: > On 7 January 2016 at 10:21, alvise rigo <[email protected]> wrote: >> Hi, >> >> On Wed, Jan 6, 2016 at 7:00 PM, Andrew Baumann >> <[email protected]> wrote: >>> As a heads up, we just added support for alignment checks in LDREX: >>> https://github.com/qemu/qemu/commit/30901475b91ef1f46304404ab4bfe89097f61b96 > >> It should be if we add an aligned variant for each of the exclusive helper. >> BTW, why don't we make the check also for the STREX instruction? > > Andrew's patch only changed the bits Windows cares about, I think. > We should indeed extend this to cover also STREX and the A64 instructions > as well, I think.
The alignment check is easily doable in general. The only tricky part I found is the A64's STXP instruction that requires quadword alignment for the 64bit paired access. In that case, the translation of the instruction will rely on a aarch64-only helper. The alternative solution would be to extend softmmu_template.h to generate 128bit accesses, but I don't believe this is the right way to go. Regards, alvise > > thanks > -- PMM
