On 5 September 2015 at 14:38, Mike Haben <[email protected]> wrote: > Hi Peter, > You're quite right, on reading some more I see the correspondence with V7. > However... while reading up on the Cortex-M3/4/7, I also found > "Only Thumb and Thumb-2 instruction sets are supported in Cortex-M > architectures, but the legacy 32-bit ARM instruction set isn't supported". > Ugh - to avoid storing up a problem for the future, I think I better think > it out again!
M profile exception handling is completely different to A/R profile, and does not use this function at all (it is done via arm_v7m_cpu_do_interrupt()). So that isn't a problem. (In fact M profile doesn't even have an SCTLR register.) thanks -- PMM
