From: Yongbok Kim <[email protected]> rt, rs were swapped
Signed-off-by: Yongbok Kim <[email protected]> Reviewed-by: Aurelien Jarno <[email protected]> Reviewed-by: Leon Alrae <[email protected]> Signed-off-by: Leon Alrae <[email protected]> --- target-mips/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 8547e2d..02c2523 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -13001,12 +13001,12 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs) case RDPGPR: check_cp0_enabled(ctx); check_insn(ctx, ISA_MIPS32R2); - gen_load_srsgpr(rt, rs); + gen_load_srsgpr(rs, rt); break; case WRPGPR: check_cp0_enabled(ctx); check_insn(ctx, ISA_MIPS32R2); - gen_store_srsgpr(rt, rs); + gen_store_srsgpr(rs, rt); break; default: goto pool32axf_invalid; -- 2.1.0
