Hi,
This patchset adds large physical address support in MIPS, specifically:
* eXtended Physical Addressing (XPA)
* Large Physical Addressing (LPA)
XPA and LPA are enabled in MIPS32R5-generic and MIPS64R6-generic cores
respectively.
The series applies on top of the Config5.FRE patches.
Regards,
Leon
v3:
* adjust mfc0 reading from 64-bit CP0 registers in MIPS32 (Aurelien)
* patch #5 is now first in the series to slightly reduce number of changes
v2:
* fix mask used in helper_{d}mtc0_entrylo{0,1} (James)
* remove superfluous brackets (James)
* add missing sign extension in mfhc0 on MIPS64 (this also fixes the issue
with missing ri/xi masking off)
* take into account CP0_LLAddr_shift (James)
* improve commit message for removing the comments in patch #6 (James)
Leon Alrae (7):
target-mips: correct MFC0 for CP0.EntryLo in MIPS64
target-mips: extend selected CP0 registers to 64-bits in MIPS32
target-mips: support Page Frame Number Extension field
target-mips: add CP0.PageGrain.ELPA support
target-mips: add MTHC0 and MFHC0 instructions
target-mips: remove misleading comments in translate_init.c
target-mips: enable XPA and LPA features
disas/mips.c | 2 +
target-mips/cpu.h | 42 +++++--
target-mips/machine.c | 21 ++--
target-mips/mips-defs.h | 4 +-
target-mips/op_helper.c | 55 ++++++---
target-mips/translate.c | 288 +++++++++++++++++++++++++++++++++++++++----
target-mips/translate_init.c | 24 ++--
7 files changed, 364 insertions(+), 72 deletions(-)
