On 05/21/2015 02:32 PM, Aurelien Jarno wrote: > When consecutive memory locations are on page boundary a page fault > might occur when using the LOAD MULTIPLE instruction. In that case real > hardware doesn't load any register. > > This is an important detail in case the base register is in the list > of registers to be loaded. If a page fault occurs this register might be > overwritten and when the instruction is later restarted the wrong > base register value is useD. > > Fix this by first loading all values from memory and then writing them > back to the registers. > > This fixes random segmentation faults seen in the guest. > > Cc: Alexander Graf <[email protected]> > Cc: Richard Henderson <[email protected]> > Signed-off-by: Aurelien Jarno <[email protected]> > --- > target-s390x/translate.c | 56 > +++++++++++++++++++++++++++++++++++++++++++----- > 1 file changed, 51 insertions(+), 5 deletions(-)
Hmm. Seems to be un/under-specified in the PoO. That said, Reviewed-by: Richard Henderson <[email protected]> It would be nice to know if there ought to be similar up-front access checking for STM, to avoid errant partial stores. r~
