On 30 October 2014 21:28, Greg Bellows <[email protected]> wrote: > From: Fabian Aggeler <[email protected]> > > SCR.{IRQ/FIQ} bits allow to route IRQ/FIQ exceptions to monitor CPU > mode. When taking IRQ exception to monitor mode FIQ exception is > additionally masked. > > Signed-off-by: Sergey Fedorov <[email protected]> > Signed-off-by: Fabian Aggeler <[email protected]> > Signed-off-by: Greg Bellows <[email protected]>
Reviewed-by: Peter Maydell <[email protected]> thanks -- PMM
