target-arm queue: I wanted to send out some of the easier stuff in
my review queue, at least. I'll try to work through the meatier
review work next week...
thanks
-- PMM
The following changes since commit d9aa68855724752a5684c6acfb17d8db15cec2f8:
Merge remote-tracking branch 'remotes/kraxel/tags/pull-usb-20140829-1' into
staging (2014-08-29 13:08:04 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20140829
for you to fetch changes up to 0614601cecc8e5d9c6c5fa606b39fe388a18583a:
target-arm: Implement pmccfiltr_write function (2014-08-29 15:00:30 +0100)
----------------------------------------------------------------
target-arm queue:
* support PMCCNTR in ARMv8
* various GIC fixes and cleanups
* Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values
* Fix regression that disabled VFP for ARMv5 CPUs
* Update to upstream VIXL 1.5
----------------------------------------------------------------
Adam Lackorzynski (4):
arm_gic: Fix read of GICD_ICFGR
arm_gic: GICD_ICFGR: Write model only for pre v1 GICs
arm_gic: Do not force PPIs to edge-triggered mode
arm_gic: Use GIC_NR_SGIS constant
Alistair Francis (6):
target-arm: Make the ARM PMCCNTR register 64-bit
target-arm: Implement PMCCNTR_EL0 and related registers
target-arm: Add arm_ccnt_enabled function
target-arm: Implement pmccntr_sync function
target-arm: Remove old code and replace with new functions
target-arm: Implement pmccfiltr_write function
Joel Schopp (1):
aarch64: raise max_cpus to 8
Peter Crosthwaite (1):
arm: Implement PMCCNTR 32b read-modify-write
Peter Maydell (3):
disas/libvixl: Update to upstream VIXL 1.5
target-arm: Fix regression that disabled VFP for ARMv5 CPUs
target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values
Sergey Fedorov (1):
hw/intc/arm_gic: honor target mask in gic_update()
disas/libvixl/README | 2 +-
disas/libvixl/a64/assembler-a64.h | 363 ++++++++++++++++++++++++++++++----
disas/libvixl/a64/constants-a64.h | 68 ++++++-
disas/libvixl/a64/cpu-a64.h | 27 +++
disas/libvixl/a64/decoder-a64.cc | 15 +-
disas/libvixl/a64/decoder-a64.h | 1 +
disas/libvixl/a64/disasm-a64.cc | 88 +++++++--
disas/libvixl/a64/disasm-a64.h | 2 +-
disas/libvixl/a64/instructions-a64.cc | 25 ++-
disas/libvixl/a64/instructions-a64.h | 10 +
disas/libvixl/platform.h | 8 +-
disas/libvixl/utils.cc | 10 +
disas/libvixl/utils.h | 32 ++-
hw/arm/virt.c | 2 +-
hw/intc/arm_gic.c | 17 +-
hw/intc/arm_gic_common.c | 2 +-
target-arm/cpu.h | 27 ++-
target-arm/cpu64.c | 3 +-
target-arm/helper.c | 138 +++++++++----
19 files changed, 697 insertions(+), 143 deletions(-)
