Can some one confirm is this is an issue with qemu implementation ? Thanks, Gaurav
On Thu, Aug 14, 2014 at 1:07 PM, Gaurav Sharma <[email protected]> wrote: > I am trying to execute a 'fcvt' instruction for conversion from single > precision to half precision value. > with the following values : > > [Instrn] > fcvt h16 s25 > > [register values] > SIMD register [25] = 0x9EA82A22AB98FBA8L > FPCR = 0x40ae2f54 [with according mask removing the UFE and other > unnecessary bit] > > As per the softfloat algorithm, if the exp is < -10, we return a signed / > unsigned zero. In this case 0x8000 is the value set in h16. > > However, when trying to match the same with arm implementation, the value > for h16 comes out as 0x8001. > While trying to map the softfloat implementation with arm manual, > depending upon rounding mode it seems we can get both 0x8000 and 0x8001. > > I am still in the process of checking the algorithm for conversion in > softfloat, but in the arm manual, i do not see we returning a zero. > > Thanks, > Gaurav > > >
