On Mon, Aug 04, 2014 at 05:11:01PM -0400, John Snow wrote: > This patch series introduces a number of small fixes and tweaks to > help support an AHCI test suite that in the future I hope to expand > to a fuller regression suite to help guide the development of the > AHCI device support under, in particular, the Q35 machine type in QEMU. > > Paolo Bonzini has contributed a number of cleanup and refactoring patches > that support changes to the PIO setup FIS packet construction code, which > is necessary for testing ths specification adherence of the IDENTIFY command, > which issues its data exclusively via PIO mechanisms. > > The ahci-test code being checked in represents a minimum of functionality > needed in order to issue and receive commands from the AHCI HBA under the > libqos / qtest environment. > > In V2, as detailed below, these tests are not currently expected to pass. > I will post a complementary patch outside of this set that highlights > the exact set of tests that will not pass, which can help verify at least > the portions of these tests that do work correctly. > > Assertions that currently fail: > - Ordering of PCI capabilities as defined by either AHCI or Intel ICH9 > - Boot-time values of the PxTFD register, which should not have valid > data until after a D2H FIS is received, but does in Qemu 2.1 > - Boot-time values of the PxSIG register, which should have a specific > placeholder signature until the first D2H FIS is received, but is > currently blank. > - The "Descriptor Processed" interrupt is expected after the IDENTIFY > command exhausts the given PRDT, but is not seen.
Thanks, I have merged patches up to and including Patch 24 onto my block tree: https://github.com/stefanha/qemu/commits/block This should make it easier to manage the next revision of the series where we can focus on the qtest test cases. Stefan
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