On 08/08/2014 11:40 AM, Bastian Koppelmann wrote:
On 08/08/2014 03:28 AM, Richard Henderson wrote:
On 08/07/2014 04:34 AM, Bastian Koppelmann wrote:
+ /* PSW flag cache for faster execution
+ if flag != 0 then flag is set. Else flag is not set.
+ */
+ target_ulong PSW_USB_C;
+ target_ulong PSW_USB_V;
+ target_ulong PSW_USB_SV;
+ target_ulong PSW_USB_AV; /* Only if bit 31 set, then flag is
set. */
+ target_ulong PSW_USB_SAV; /* Only if bit 31 set, then flag is
set. */
V and SV are also only set if bit 31 is set, the way we're computing
overflow
from addition. Of course, overflow from saturation or multiplication
isn't
being computed into bit 31, so there is a decision to make.
I would not define V and SV as bit 31. It would not change the
generation of add/sub insn, but adds additional tcg insn to mul and
saturation. It would just help the psw_write/_read helpers, which are
not that often called. But maybe I'm missing future insn that might
benefit :).
Never mind. I see the problem now. The computation of the V bit for
add/sub insn will set more than just the 31 bit.
So I would choose to define it as bit 31, to benefit the more common
add/sub insn.
Depending on how important it is for ADDX+ADDC to be implemented
efficiently,
vs how important is for SHA to be quick, you may wish to have C
already set to
0/1 only.
r~
