On 3 July 2014 18:39, Alexander Graf <[email protected]> wrote: > Mac OS X reads ICR on every interrupt. When the IRQ line is shared, this may > result in a race where LSC is not interpreted yet, but already gets cleared. > > The guest already has a way of telling us that it can interpret LSC events > though and that's via the interrupt mask register (IMS). > > So if we just leave the LSC interrupt bit pending, but invisible to the guest > as long as it's not ready to receive LSC interrupts, we basically defer the > interrupt to the earliest point in time when the guest would know how to > handle it.
This would break any guests dealing with this in a polling mode (ie "permanently leave interrupts masked and read ICR periodically to find out whether anything interesting has happened"), right? thanks -- PMM
