Am 13.05.2014 14:57, schrieb Paolo Bonzini: > Paolo Bonzini (7): > kvm: reset state from the CPU's reset method > kvm: forward INIT signals coming from the chipset > target-i386: fix set of registers zeroed on reset > target-i386: preserve FPU and MSR state on INIT > apic: do not accept SIPI on the bootstrap processor > cpu: make CPU_INTERRUPT_RESET available on all targets > pc: port 92 reset requires a low->high transition
You forgot to fill in my Rbs, and somehow the Cc:s were not processed to detect this earlier. Also to me a generic cpu_soft_reset() contradicts Peter confirming that doing this in a specific qemu_irq based way is desired? If the PC is going to implement the qemu_irq triggered logic, then CPU_FOREACH() can be done in PC code, and no generalization of interrupt names is needed. Or do you have any non-x86 work cooking as well? Regards, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
