On 13.05.2014 20:15, Fabian Aggeler wrote:
> arm_is_secure() function allows to determine CPU security state
> if the CPU implements Security Extensions.
>
> Signed-off-by: Sergey Fedorov <[email protected]>
> Signed-off-by: Fabian Aggeler <[email protected]>
> ---
> target-arm/cpu.h | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index a56d3d6..6ea0432 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -640,6 +640,21 @@ static inline int arm_feature(CPUARMState *env, int
> feature)
> return (env->features & (1ULL << feature)) != 0;
> }
>
> +/* Return true if the processor is in secure state */
> +static inline bool arm_is_secure(CPUARMState *env)
> +{
> +#if !defined(CONFIG_USER_ONLY)
> + if (arm_feature(env, ARM_FEATURE_SECURITY_EXTENSIONS)) {
I think feature test can be safely avoided here. Without this feature
that should be no way to switch to monitor mode and to access SCR register.
> + return ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) ||
> + !(env->cp15.c1_scr & 1);
> + } else {
> + return false;
> + }
> +#else
> + return false;
That is a good question how to treat user emulation: secure or
non-secure. Perhaps assuming user emulation in secure state may simplify
code in the following patches.
> +#endif
> +}
> +
> /* Return true if the specified exception level is running in AArch64 state.
> */
> static inline bool arm_el_is_aa64(CPUARMState *env, int el)
> {
Thanks,
Sergey.
