Two small fixes for the ESP (AM53C94) SCSI controller
* Signal the end of the DMA transfer after a SCSI command. * The status register (RSTAT) is cleared after reading the interrupt status register (RINTR), except for the TC bit (=Count To Zero) and the scsi phase bits, which mirror SCSI signals levels. Fixes the bug "esp0: !TC on DATA XFER" with NetBSD https://bugs.launchpad.net/qemu/+bug/1055090 Signed-off-by: Olivier Danet <[email protected]> --- hw/scsi/esp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 2d150bf..5e91077 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -246,6 +246,7 @@ static void esp_do_dma(ESPState *s) s->cmdlen = 0; s->do_cmd = 0; do_cmd(s, s->cmdbuf); + esp_dma_done(s); return; } if (s->async_len == 0) { @@ -417,10 +418,9 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr) except TC */ old_val = s->rregs[ESP_RINTR]; s->rregs[ESP_RINTR] = 0; - s->rregs[ESP_RSTAT] &= ~STAT_TC; s->rregs[ESP_RSEQ] = SEQ_CD; esp_lower_irq(s); - + s->rregs[ESP_RSTAT] &= STAT_TC | STAT_MI; return old_val; default: break; -- 1.8.1.5
