Quoting Aurelien Jarno (2013-09-09 12:27:47)
> 32-bit versions of sar and shr ops should not propagate known-zero bits
> from the unused 32 high bits. For sar it could even lead to wrong code
> being generated.
>
> Cc: Richard Henderson <[email protected]>
> Cc: Paolo Bonzini <[email protected]>
> Cc: [email protected]
> Signed-off-by: Aurelien Jarno <[email protected]>
> ---
> tcg/optimize.c | 21 +++++++++++++++++----
> 1 file changed, 17 insertions(+), 4 deletions(-)
Ping, looking to pull this in for 1.7.1
>
> diff --git a/tcg/optimize.c b/tcg/optimize.c
> index b29bf25..c539e39 100644
> --- a/tcg/optimize.c
> +++ b/tcg/optimize.c
> @@ -730,16 +730,29 @@ static TCGArg *tcg_constant_folding(TCGContext *s,
> uint16_t *tcg_opc_ptr,
> mask = temps[args[1]].mask & mask;
> break;
>
> - CASE_OP_32_64(sar):
> + case INDEX_op_sar_i32:
> + if (temps[args[2]].state == TCG_TEMP_CONST) {
> + mask = ((int32_t)temps[args[1]].mask
> + >> temps[args[2]].val);
> + }
> + break;
> + case INDEX_op_sar_i64:
> if (temps[args[2]].state == TCG_TEMP_CONST) {
> - mask = ((tcg_target_long)temps[args[1]].mask
> + mask = ((int64_t)temps[args[1]].mask
> >> temps[args[2]].val);
> }
> break;
>
> - CASE_OP_32_64(shr):
> + case INDEX_op_shr_i32:
> if (temps[args[2]].state == TCG_TEMP_CONST) {
> - mask = temps[args[1]].mask >> temps[args[2]].val;
> + mask = ((uint32_t)temps[args[1]].mask
> + >> temps[args[2]].val);
> + }
> + break;
> + case INDEX_op_shr_i64:
> + if (temps[args[2]].state == TCG_TEMP_CONST) {
> + mask = ((uint64_t)temps[args[1]].mask
> + >> temps[args[2]].val);
> }
> break;
>
> --
> 1.7.10.4
