Am 17.08.2012 12:56, schrieb Jan Kiszka: > This MMIO area is an entry gate to legacy PC ISA devices, addressed via > PIO over there. Quite a few of the PIO ports have side effects on access > like starting/stopping timers that must be executed properly ordered > /wrt the CPU. So we have to remove the coalescing mark. > > Acked-by: Hervé Poussineau <[email protected]>
(I would expect this to go under the SoB, documenting the chronological order...) > Signed-off-by: Jan Kiszka <[email protected]> I had consented to this fix and expected it to go in alongside the series this came in (kvm/uq-master?). Anthony, do you want a prep PULL for this now? Otherwise explicitly: Acked-by: Andreas Färber <[email protected]> Regards, Andreas > --- > hw/i82378.c | 1 - > 1 files changed, 0 insertions(+), 1 deletions(-) > > diff --git a/hw/i82378.c b/hw/i82378.c > index 9b11d90..2123c14 100644 > --- a/hw/i82378.c > +++ b/hw/i82378.c > @@ -225,7 +225,6 @@ static int pci_i82378_init(PCIDevice *dev) > pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io); > > memory_region_init_io(&s->mem, &i82378_mem_ops, s, "i82378-mem", > 0x01000000); > - memory_region_set_coalescing(&s->mem); > pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); > > /* Make I/O address read only */ >
