On Mon, Aug 13, 2012 at 09:52:43PM +0200, Igor Mammedov wrote:
> On 08/07/2012 09:56 PM, Eduardo Habkost wrote:
> >This changes FW_CFG_MAX_CPUS and FW_CFG_NUMA to use apic_id_for_cpu(),
> >so the NUMA table can be based on the APIC IDs, instead of CPU index
> >(SeaBIOS knows nothing about CPU indexes, just APIC IDs).
> >
> >Signed-off-by: Eduardo Habkost <[email protected]>
> >---
> > hw/pc.c | 23 ++++++++++++++++-------
> > target-i386/cpu.h | 7 +++++++
> > 2 files changed, 23 insertions(+), 7 deletions(-)
> >
> >diff --git a/hw/pc.c b/hw/pc.c
> >index 10449bd..9afb838 100644
> >--- a/hw/pc.c
> >+++ b/hw/pc.c
> >@@ -581,6 +581,11 @@ int e820_add_entry(uint64_t address, uint64_t length,
> >uint32_t type)
> > return index;
> > }
> >
> >+unsigned int apic_id_limit(void)
> >+{
> >+ return apic_id_for_cpu(max_cpus - 1) + 1;
> >+}
> >+
> > static void *bochs_bios_init(void)
> > {
> > void *fw_cfg;
> >@@ -588,6 +593,7 @@ static void *bochs_bios_init(void)
> > size_t smbios_len;
> > uint64_t *numa_fw_cfg;
> > int i, j;
> >+ unsigned int max_apic_id = apic_id_limit();
> >
> > register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
> > register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
> >@@ -602,7 +608,7 @@ static void *bochs_bios_init(void)
> > register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
> >
> > fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
> >- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> >+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_apic_id);
> FW_CFG_MAX_CPUS becoming not MAX_CPUS sounds a bit confusing, perhaps
> short comment should be here to document this and why it's not? So
> code reader won't make false assumptions?
True. I tried to quickly explain the problem in the commit message, but
it sounds confusing enough to deserve a comment in the code.
(It would be even better if we had an official place to document _all_
the fw_cfg fields).
>
> > fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
> > fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
> > fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
> >@@ -622,21 +628,24 @@ static void *bochs_bios_init(void)
> > * of nodes, one word for each VCPU->node and one word for each node to
> > * hold the amount of memory.
> > */
> >- numa_fw_cfg = g_malloc0((1 + max_cpus + nb_numa_nodes) * 8);
> >+ numa_fw_cfg = g_malloc0((1 + max_apic_id + nb_numa_nodes) * 8);
> > numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
> >- for (i = 0; i < max_cpus; i++) {
> >+ unsigned int cpu_idx;
> >+ for (cpu_idx = 0; cpu_idx < max_cpus; cpu_idx++) {
> >+ unsigned int apic_id = apic_id_for_cpu(cpu_idx);
> >+ assert(apic_id < max_apic_id);
> > for (j = 0; j < nb_numa_nodes; j++) {
> >- if (test_bit(i, node_cpumask[j])) {
> >- numa_fw_cfg[i + 1] = cpu_to_le64(j);
> >+ if (test_bit(cpu_idx, node_cpumask[j])) {
> >+ numa_fw_cfg[apic_id + 1] = cpu_to_le64(j);
> > break;
> > }
> > }
> > }
> > for (i = 0; i < nb_numa_nodes; i++) {
> >- numa_fw_cfg[max_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
> >+ numa_fw_cfg[max_apic_id + 1 + i] = cpu_to_le64(node_mem[i]);
> > }
> > fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
> >- (1 + max_cpus + nb_numa_nodes) * 8);
> >+ (1 + max_apic_id + nb_numa_nodes) * 8);
> >
> > return fw_cfg;
> > }
> >diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> >index 39ea005..257d6c7 100644
> >--- a/target-i386/cpu.h
> >+++ b/target-i386/cpu.h
> >@@ -919,6 +919,13 @@ void host_cpuid(uint32_t function, uint32_t count,
> > */
> > unsigned int apic_id_for_cpu(int cpu_index);
> >
> >+/* Calculate limit for the APIC ID value, based on max_cpus
> >+ *
> >+ * On PC, FW_CFG_MAX_CPUS is not max_cpus, but the limit for the APIC IDs
> >+ * of all CPUs (so that of all CPUs APIC ID < MAX_CPUS).
> >+ */
> >+unsigned int apic_id_limit(void);
> >+
> >
> > /* helper.c */
> > int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
> >
>
>
> --
> Regards,
> Igor
--
Eduardo
