On Fri, Feb 27, 2026 at 1:36 PM Brian Cain <[email protected]> wrote:
> From: Brian Cain <[email protected]> > > Also: add nop TCG overrides for break, unpause, fetchbo; add TCG > override for dczeroa_nt (non-temporal variant of dczeroa). > > break: this hardware breakpoint instruction is used with the in-silicon > debugger feature, this is not modeled. > > unpause: this instruction is used to resume hardware threads that are > stalled by pause instructions. pause is modeled as a nop, or in RR > mode as an EXCP_YIELD. This instruction is safe to ignore. > > Since prefetch functions are not modeled, fetchbo is safe to ignore. > > Signed-off-by: Brian Cain <[email protected]> > --- > target/hexagon/cpu_bits.h | 7 ++ > target/hexagon/gen_tcg.h | 9 ++ > target/hexagon/macros.h | 25 +++- > target/hexagon/sys_macros.h | 237 ++++++++++++++++++++++++++++++++++++ > target/hexagon/op_helper.c | 1 + > 5 files changed, 278 insertions(+), 1 deletion(-) > create mode 100644 target/hexagon/sys_macros.h > > diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h > index 91e9da09e03..3cbf8b7f570 100644 > --- a/target/hexagon/cpu_bits.h > +++ b/target/hexagon/cpu_bits.h > @@ -97,6 +97,13 @@ enum hex_cause { > HEX_CAUSE_INT7 = 0x0c7, > }; > > +enum data_cache_state { > + HEX_DC_STATE_INVALID = 0x0, > + HEX_DC_STATE_VALID = 0x1, > + HEX_DC_STATE_RESERVED = 0x2, > + HEX_DC_STATE_UNUSED_WT = 0x3, > +}; > + > Are these needed? > diff --git a/target/hexagon/sys_macros.h b/target/hexagon/sys_macros.h > new file mode 100644 > index 00000000000..3b66b83695c > --- /dev/null > +++ b/target/hexagon/sys_macros.h > @@ -0,0 +1,237 @@ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + */ > + > +#ifndef HEXAGON_SYS_MACROS_H > +#define HEXAGON_SYS_MACROS_H > + > +/* > + * Macro definitions for Hexagon system mode > + */ > + > +#ifndef CONFIG_USER_ONLY > + > +#define READ_SGP0() (env->t_sreg[HEX_SREG_SGP0]) > +#define READ_SGP1() (env->t_sreg[HEX_SREG_SGP1]) > +#define READ_SGP10() ((uint64_t)(env->t_sreg[HEX_SREG_SGP0]) | \ > + ((uint64_t)(env->t_sreg[HEX_SREG_SGP1]) << 32)) > + > +#define WRITE_SGP0(VAL) log_sreg_write(env, HEX_SREG_SGP0, VAL, > slot) > +#define WRITE_SGP1(VAL) log_sreg_write(env, HEX_SREG_SGP1, VAL, > slot) > +#define WRITE_SGP10(VAL) \ > + do { \ > + log_sreg_write(env, HEX_SREG_SGP0, (VAL) & 0xFFFFFFFF, slot); \ > + log_sreg_write(env, HEX_SREG_SGP1, (VAL) >> 32, slot); \ > + } while (0) > + > Are these READ/WRITE macros needed? They look like remnants of the old generators? Otherwise Reviewed-by: Taylor Simpson <[email protected]>
