Add the following CPU versions that were previously missing
v5
v55
v60
v61
v62
v65
Create a CPUHexagonDef struct to represent the definition of a core
Currently contains an enum with the known Hexagon CPU versions
Add a field to HexagonCPUClass to note the Hexagon definition
Co-authored-by: Matheus Tavares Bernardino <[email protected]>
Co-authored-by: Brian Cain <[email protected]>
Signed-off-by: Taylor Simpson <[email protected]>
---
target/hexagon/cpu-qom.h | 27 +++++++++++++++++++++++
target/hexagon/cpu.h | 2 ++
target/hexagon/cpu.c | 46 ++++++++++++++++++++++++----------------
3 files changed, 57 insertions(+), 18 deletions(-)
diff --git a/target/hexagon/cpu-qom.h b/target/hexagon/cpu-qom.h
index 0b149bd5fe..6e1bb04070 100644
--- a/target/hexagon/cpu-qom.h
+++ b/target/hexagon/cpu-qom.h
@@ -11,11 +11,38 @@
#include "hw/core/cpu.h"
+typedef enum {
+ HEX_VER_NONE = 0x00,
+ HEX_VER_V5 = 0x04,
+ HEX_VER_V55 = 0x05,
+ HEX_VER_V60 = 0x60,
+ HEX_VER_V61 = 0x61,
+ HEX_VER_V62 = 0x62,
+ HEX_VER_V65 = 0x65,
+ HEX_VER_V66 = 0x66,
+ HEX_VER_V67 = 0x67,
+ HEX_VER_V68 = 0x68,
+ HEX_VER_V69 = 0x69,
+ HEX_VER_V71 = 0x71,
+ HEX_VER_V73 = 0x73,
+ HEX_VER_ANY = 0xff,
+} HexagonVersion;
+
+typedef struct {
+ HexagonVersion hex_version;
+} HexagonCPUDef;
+
#define TYPE_HEXAGON_CPU "hexagon-cpu"
#define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU
#define HEXAGON_CPU_TYPE_NAME(name) (name HEXAGON_CPU_TYPE_SUFFIX)
+#define TYPE_HEXAGON_CPU_V5 HEXAGON_CPU_TYPE_NAME("v5")
+#define TYPE_HEXAGON_CPU_V55 HEXAGON_CPU_TYPE_NAME("v55")
+#define TYPE_HEXAGON_CPU_V60 HEXAGON_CPU_TYPE_NAME("v60")
+#define TYPE_HEXAGON_CPU_V61 HEXAGON_CPU_TYPE_NAME("v61")
+#define TYPE_HEXAGON_CPU_V62 HEXAGON_CPU_TYPE_NAME("v62")
+#define TYPE_HEXAGON_CPU_V65 HEXAGON_CPU_TYPE_NAME("v65")
#define TYPE_HEXAGON_CPU_V66 HEXAGON_CPU_TYPE_NAME("v66")
#define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
#define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME("v68")
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index 85afd59277..f99647dfb6 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -117,6 +117,8 @@ typedef struct HexagonCPUClass {
DeviceRealize parent_realize;
ResettablePhases parent_phases;
+
+ const HexagonCPUDef *hex_def;
} HexagonCPUClass;
struct ArchCPU {
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 58a22ee41f..949d509a15 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -27,13 +27,6 @@
#include "exec/gdbstub.h"
#include "accel/tcg/cpu-ops.h"
-static void hexagon_v66_cpu_init(Object *obj) { }
-static void hexagon_v67_cpu_init(Object *obj) { }
-static void hexagon_v68_cpu_init(Object *obj) { }
-static void hexagon_v69_cpu_init(Object *obj) { }
-static void hexagon_v71_cpu_init(Object *obj) { }
-static void hexagon_v73_cpu_init(Object *obj) { }
-
static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
@@ -377,11 +370,21 @@ static void hexagon_cpu_class_init(ObjectClass *c, const
void *data)
cc->tcg_ops = &hexagon_tcg_ops;
}
-#define DEFINE_CPU(type_name, initfn) \
- { \
- .name = type_name, \
- .parent = TYPE_HEXAGON_CPU, \
- .instance_init = initfn \
+static void hexagon_cpu_class_base_init(ObjectClass *c, const void *data)
+{
+ HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c);
+ /* Make sure all CPU models define a HexagonCPUDef */
+ g_assert(!object_class_is_abstract(c) && data != NULL);
+ mcc->hex_def = data;
+}
+
+#define DEFINE_CPU(type_name, version) \
+ { \
+ .name = type_name, \
+ .parent = TYPE_HEXAGON_CPU, \
+ .class_data = &(const HexagonCPUDef) { \
+ .hex_version = version, \
+ } \
}
static const TypeInfo hexagon_cpu_type_infos[] = {
@@ -394,13 +397,20 @@ static const TypeInfo hexagon_cpu_type_infos[] = {
.abstract = true,
.class_size = sizeof(HexagonCPUClass),
.class_init = hexagon_cpu_class_init,
+ .class_base_init = hexagon_cpu_class_base_init,
},
- DEFINE_CPU(TYPE_HEXAGON_CPU_V66, hexagon_v66_cpu_init),
- DEFINE_CPU(TYPE_HEXAGON_CPU_V67, hexagon_v67_cpu_init),
- DEFINE_CPU(TYPE_HEXAGON_CPU_V68, hexagon_v68_cpu_init),
- DEFINE_CPU(TYPE_HEXAGON_CPU_V69, hexagon_v69_cpu_init),
- DEFINE_CPU(TYPE_HEXAGON_CPU_V71, hexagon_v71_cpu_init),
- DEFINE_CPU(TYPE_HEXAGON_CPU_V73, hexagon_v73_cpu_init),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V5, HEX_VER_V5),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V55, HEX_VER_V55),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V60, HEX_VER_V60),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V61, HEX_VER_V61),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V62, HEX_VER_V62),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V65, HEX_VER_V65),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V66, HEX_VER_V66),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V67, HEX_VER_V67),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V68, HEX_VER_V68),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V69, HEX_VER_V69),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V71, HEX_VER_V71),
+ DEFINE_CPU(TYPE_HEXAGON_CPU_V73, HEX_VER_V73),
};
DEFINE_TYPES(hexagon_cpu_type_infos)
--
2.43.0
