The registers are only 32 bits wide, so we should cast the 64-bit value passed in to only be 32 bits wide.
Signed-off-by: Joe Komlodi <[email protected]> Reviewed-by: Patrick Venture <[email protected]> Reviewed-by: Titus Rwantare <[email protected]> Reviewed-by: Jamin Lin <[email protected]> Signed-off-by: Jamin Lin <[email protected]> --- hw/i3c/dw-i3c.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c index e20244de2c..9dc71aa3d8 100644 --- a/hw/i3c/dw-i3c.c +++ b/hw/i3c/dw-i3c.c @@ -363,10 +363,11 @@ static void dw_i3c_write(void *opaque, hwaddr offset, uint64_t value, { DWI3C *s = DW_I3C(opaque); uint32_t addr = offset >> 2; + uint32_t val32 = (uint32_t)value; trace_dw_i3c_write(s->id, offset, value); - value &= ~dw_i3c_ro[addr]; + val32 &= ~dw_i3c_ro[addr]; switch (addr) { case R_HW_CAPABILITY: case R_RESPONSE_QUEUE_PORT: @@ -392,7 +393,7 @@ static void dw_i3c_write(void *opaque, hwaddr offset, uint64_t value, case R_RESET_CTRL: break; default: - s->regs[addr] = value; + s->regs[addr] = val32; break; } } -- 2.43.0
