On 2/6/26 04:19, Jamin Lin wrote:
v1:
The initial patch series was based on work by Joe Komlodi
<[email protected]>.
This series adds I3C bus support to QEMU and adds more functionality to the
Aspeed I3C controller.
This implementation is a basic implementation that introduces IBIs
(including hot-join), CCCs, and SDR data transfer. As-is, it doesn't support
multi-controller buses or HDR transfers.
First we add the I3C bus and controller model. With that added we extend
the functionality of the Aspeed I3C controller so it can do transfers
and handle IBIs.
Next, we add a mock I3C target. It's intended to be a very simple target
just to verify that I3C is working on the guest. Internally, we've used it
on Linux to verify that i3C devices can be probed and can send/receive data
and IBIs.
This target is sort of like an EEPROM, and it can also send IBIs upon
reception of a user-defined magic number.
Lastly we add hotplugging support. The hotplugging doesn't do anything too
complicated, it just adds the device attempting to hotplug to the bus. It
is the device's responsibility to hot-join and go through the DAA process
to participate on the bus.
v2:
Jamin Lin <[email protected]> has taken ownership of the I3C patch
series for upstream submission.
Changes in this version include:
1. Added I3C functional tests.
2. Updated patch 4 to refine register field definitions.
3. Updated patch 7 to correct read-only register field masks.
v3:
1. Add Signed-off-by: Jamin Lin <[email protected]>
2. Fix a typo
3. Fix ASPEED mail server issue
Looks good. I received the series correctly and b4 can fetch the patches.
Thanks for the time you all spent on these email issues ,
C.
